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Prodigy ProtoBridge

An FPGA-Assisted Verification Tool

FPGA-based prototypes closely resemble final silicon chips in speed and accuracy, providing significant value in full-chip validation and early software development. Realizing these benefits has historically been met with the need to build additional hardware with significant resources and specialized expertise having to be employed to obtain the necessary FPGA connectivity.

FPGA-Assisted Verification Tool

The unique Prodigy ProtoBridge AXI FPGA-Assisted Verification Tool uses the widely adopted AXI-4 bus protocol within its patented technology to link the design to the FPGA-based prototyping environment. The result is a high-throughput channel that allows for the transfer of large amounts of transaction-level data between the FPGA(s) and a host computer.

Product Features

  • AXI-4 transaction-level interconnection module and Master/Slave interfaces for FPGA integration

  • A set of C-API function calls to perform AXI bus transactions in the host computer

  • PCIe3 driver for Linux or Windows operating systems to control Logic Module operations

  • C-API reference operations with sample access to FPGA internal memory

  • System integration guide to connect user RTL code with the ProtoBridge AXI-4 bus module

Features & Benefits



Early IP Verification without the complete SoC design

  • IP blocks connected to the AXI bus can be verified without processor cores or peripheral blocks

  • Early algorithm/architectural exploration can be performed on the FPGA while taking advantage of the FPGA environment's speed performance

Shorten Design Verification Time with a high-throughput channel

  • Transaction-level verification is utilized to ensure system-level result accuracy

  • C-code is used as a stimulus to reduce the time and effort in creating RTL test benches

Achieve High Product Reliability with improved test coverage

  • Create corner test cases in software and run exercises on an FPGA-based prototype

  • Run high-performance regression tests on an FPGA-based prototype with vectors stored in host computers


Eliminate Resource & Expertise Constraints by removing the need for the creation of additional specialized hardware and software

Prodigy ProtoBridge Reuse Across Multiple Projects as the flexibility of Prodigy ProtoBridge makes it ideal for any design

Get World-Class Support to help design teams with any issues that arise-something not available with in-house solutions leaving design teams to fend for themselves


AXI-4 Bus Protocol Between Host PC and FPGA

  • Instantiation of AXI-4, AXI4-Lite, AXI-3 and AHB bus connections on FPGA ports

  • Configurable data width from 32-bit to 1024-bit

  • Support for an independent clock for each Master/Slave instance

Exercise of Large Amounts of Verification Data at High Speed

  • Transmission through 8-lane PCIe Gen3 between Host PC and FPGA

  • Massive data transfer from Host PC to FPGA up to 4000 MB/s

  • Support for direct and DMA access modes

Rich Coverage of C Function Calls Between Host PC and FPGA

  • System initialization function calls to manage the tool environment

  • Interrupt control function calls to identify the source of an interrupt signal for C-API's follow-up actions

  • Data read/write function calls to communicate with and operate the FPGA circuit

  • DMA transfer function calls to perform DMA operations for large amounts of data

Protobridge AXI

Unique Shared Memory Operation Increases FPGA Prototyping Memory Capacity

  • Uses PC memory to store data alleviating the need to store data on the design under test's (DUT's) memory

  • Allows DUT to exchange data with host PC's memory

  • Simplifies DUT operations of moving the generated data for further design and debug

  • Provides easy access to memory content by other tasks running on the host PC at the same time

Compatible with Other ASIC Verification Flows to Expand Usage

  • Use with other commercial or in-house verification tools through standard AXI-based C-API


FPGA platforms supported

  • KU115/VU440 Logic Module

  • VUS/VU19P/VU9P/S10S/S10M Logic System

OSs supported

  • Windows 7 (64-bit)

  • Ubuntu 14.04.2 (64-bit)

  • RHEL 6.5 (64-bit)

PCIe version

  • x8 PCIe Gen3

Request for Quote

What type of chip are you designing?
What is the capacity of the ASIC gate included in the design?
5 million-20 million
20 million-50 million
50 million-100 million
100 million-1 billion
More than 1 billion
Which FPGA do you prefer to use?
Xilinx VU440
Xilinx KU115
Xilinx VU19P
Xilinx VU13P
Xilinx VU9P
Intel S10-10M
Intel S10-2800
Not sure, need professional advice
What kind of FPGA configuration do you need?
Single FPGA
Four FPGAs
Eight FPGAs
Not sure, need professional advice
What kind of peripheral interface do you need?
How many prototype verification platforms do you need?
Do you need the following tools?
Segmentation tool
Multiple FPGA debugging tools
Co-modeling tool (allows large amounts of data to interact between FPGA and PC host)
When do you need to use our products?
0-6 months
6-12 months
More than 12 months
Not sure
Any additional comments?
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Verification code

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