by Don Dingee Published on 11-30-2016 03:00 PM
Using OpenCL, a developer can write an algorithm once, emulate it on a PC, then choose what hardware to run it on - or partition it across several different types of hardware depending on cost and packaging. Intel's FPGA SDK for OpenCL helps abstract out FPGA complexity for hardware acceleration. Their compiler can perform over 300 optimizations, then synthesize the FPGA in a single step.
Several different hosts are supported, including ARM Cortex-A9 cores typical of SoCs, IBM POWER Series processors, and X86 CPUs. The solution can be scaled across multiple FPGAs, which makes it ideal for the FPGA-based prototyping scenario. Instead of taking overt partitioning steps and spreading out RTL across several FPGAs, OpenCL code distributes seamlessly across FPGA devices. This is a huge advantage for HPC teams who want to concentrate on software, not hardware, and especially not the nuances of FPGA programming.
The thing about FPGA-based prototyping is it is becoming less about the FPGA and more about the software running on the platform. While the entire S2C prototyping portfolio including expansion daughter cards, configuration, and debug capability comes to bear, the real news here is how OpenCL speeds up the software development process. The shape of HPC is changing from big, expensive iron to reconfigurable, accelerated computing with FPGAs underneath the hood.
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