S2C has released the TAI Verification Module (patent pending), a prototype verification product that allows user designs in FPGA-based prototypes to be verified with massive and fast test benches through a x4 PCIe Gen2 channel to the PC. The Altera Stratix-4 GX FPGA-based TAI Verification Module has integrated Altera SignalTap Logic Analyzer with S2C's TAI Player software enabling concurrent debugging of multi-FPGA design using the RTL names. This innovative technology supports set up of multiple groups of 480 probes during design compilation so the user can view thousands of RTL-level probes in multiple FPGA without requiring lengthy FPGA recompilation. In addition, the TAI Verification Module can be used as a logic module with capacities of 1.8 Million and 3.6 Million gates.

S2C released its highest capacity SoC/ASIC prototyping system, the Quad S4 TAI Logic Module, based on four Altera Stratix IV 820 FPGAs. The Quad S4 TAI Logic Module can hold design up to 32.8 million gates and features S2C's fourth generation prototyping technology including enhanced power management, cooling mechanisms, noise shielding and convenient SD card download.

“This is an extension of our fourth generation technology first released in June 2010. We have shipped over 100 Altera Stratix IV-based dual and single S4 TAI Logic Modules in just nine months and we are pleased to offer the new Quad S4 to assist designers in prototyping even larger and more complex SoC/ASIC designs. Prototyping near real system performance is crucial in today’s design flow. This allows SoC hardware to be validated in real life and software developed concurrently. However many project managers have chosen not to prototype due to the difficulties in building/acquiring a multiple FPGA board that can meet their application/performance requirements that are reliable and easy to map a design into multiple FPGAs and debug. The Quad S4 TAI Logic Modules is designed to solve these issues and in addition, S2C’s TAI Player Pro 4.1 software release has been enhanced to support partitioning designs into four FPGAs”, said Mon-Ren Chene, Chairman and CTO of S2C.

The annual SoCIP Conference has become China's premier show to feature the latest technology and product information for the SoC design community. This year's show, which was held in Shanghai and Beijing at the end of May, attracted over 300 qualified attendees and 14 exhibitors. The show is organized by S2C, a leading rapid SoC prototyping company, headquartered in San Jose, CA with development and support centers in Shanghai, Beijing, Shenzhen China and HsinChu, Taiwan.

This year's show included exhibits and presentations from the following IP and EDA vendors plus support from our media sponsors:

The show has a balance of a technical conference with in-depth technical sessions and exhibition enabling one-on-one interaction with the EDA and IP vendors. S2C, as the organizer, thanks all the exhibitors, and media for their participation in making SoCIP2011 a valuable resource for the SoC design community.